Bnc 6040 Manual do Utilizador

Instruction Manual

10 SPECIFICATIONS Input Characteristics TRIG IN External trigger to initiate delay and width sequences. Range: 0-100 MHz. I

11 SPECIFICATIONS TRIG OUT Denotes the start of a liming cycle. Amplitude: +2 V into 50 ohms. +4 V into 100 ohms. Transi

12 SPECIFICATIONS Programming GPIB IEEE-488 Remote interface with all functions and parameters programmable and bus triggerable. Interface

13 SPECIFICATIONS RECALL Stored settings can be manually recalled or bus transferred to the mainframe. The setting in memory 0 is ac

14 SPECIFICATIONS Table 1-3. Error Status Byte Bit Description 7 Always zero 6 Always zero 5 Always zero 4 Always zero 3 Always zer

15 SECTION 2 OPERATING INFORMATION General POWER UP When power is first applied, the mainframe performs a test to determine if a module is

16 OPERATING INFORMATION Module Installation To install a module, turn the power off, slide the module in and tighten the mount screw kn

17 OPERATING INFORMATION TROUBLESHOOTING To start, make sure that the line cord is plugged in all the way, and that the power-on key switch is

18 OPERATING INFORMATION Press the TIMING key to display the Delay parameter ("Delay: 1.000 µs"). Move the cursor (using the {} key

19 OPERATING INFORMATION FRONT PANEL DESCRIPTION Power Switch The power switch, located in the lower left comer of the front panel, is keyed

2 WARRANTY Berkeley Nucleonics Corporation warrants all instruments, including component parts, to be free from defects in material

20 OPERATING INFORMATION Control Keypad Some of these keys are dependent on the presence of a plug-in module. For example, the LEVEL, STORE and

21 OPERATING INFORMATION Plug-In Module Receptacle The plug-in module receptacle is on the right side of the front panel, and accepts a singl

22 OPERATING INFORMATION RESET Button The RESET pushbutton initiates a power-on sequence. This resets the microprocessor board which in turn r

23 OPERATING INFORMATION The MODE and TRIG menu keys change the operating state of the 6040 directly. As the user sequences through the Mode m

24 OPERATING INFORMATION Numeric Data Entry To enter an entirely new value, simply type in the desired value using the digit, decimal point,

25 OPERATING INFORMATION Parameter Scanning The second method of altering a parameter is incremental. First display the desired parameter. The

26 OPERATING INFORMATION Control Key Descriptions The following is a detailed description of each key on the control keypad. The discussion fol

27 OPERATING INFORMATION Table 1-6. Menu Keys For Stand Alone Operation MODE Menu Pulse TRIG Menu Single Cycle

28 OPERATING INFORMATION Menu Keys {MODE} Sequences through the Mode menu and determines the type of output waveform produced. The selections

29 OPERATING INFORMATION {TRIG} Sequences through the trigger source and parameter menu. This is used in the Pulse and Impulse Modes. The se

3 CONTENTS Page SECTION 1 SPECIFICATIONS 9 Model 6040 Mainfra

30 OPERATING INFORMATION Delay controls the time interval from the TRIG OUT pulse to the mainframe (PULSE OUT and ECL OUT) or module outputs. I

31 OPERATING INFORMATION Front Panel Display (for an optical plug-in module with 3 digit resolution): < Lv Peak: x.xx *W > < Lv Bsln

32 OPERATING INFORMATION {STORE} Allows the storage of the present machine state in one of ten (nonvolatile) memory locations in the module.

33 OPERATING INFORMATION Note: This display appears only on the return to local from remote operation. Also, under GPIB operation, the bus co

34 OPERATING INFORMATION REMOTE PROGRAMMING Remote programming can be accomplished via either the RS-232 serial interface or the IEEE-488 GPIB.

35 OPERATING INFORMATION The transfer from mainframe memory into hardware of a new parameter can be suppressed by following the value with a

36 OPERATING INFORMATION ES Error Status. This returns a single byte that flags any errors that have occurred since the previous ES command.

37 OPERATING INFORMATION Bit 1: This bit is set if the PLL for the internal rep rate generator is unlocked. Bit 0: This bit is set if a tim

38 OPERATING INFORMATION TR PCC {x} Trigger Control, where the secondary PCC is one of the following: ED {v} External Drive (threshold set

39 OPERATING INFORMATION There are no secondary PCCs used with the mention' commands. The formal is simple, the memory PCC followed by a s

4 CONTENTS Menus and Parameter Selection 22 Modifying Parameters

40 OPERATING INFORMATION Supplemental Control Commands These commands provide additional methods for controlling the instrument. They do n

41 SECTION 3 THEORY OF OPERATION General PULSE GENERATOR Figure 3-1 shows a simplified block diagram of the timing circuits. There are fou

42 THEORY OF OPERATION When power is first applied the software determines if a plug-in module is present and configures the front panel user i

43 THEORY OF OPERATION The external trigger circuit consists of Z4, Z7, Z13, Z22 and Q3, Z4 (a DAC) is supplied data from the microprocessor boa

44 THEORY OF OPERATION At the start of the width timing cycle Z6-15 transmits a rising edge to the clock input of Z28 via DL2. This initiates th

45 THEORY OF OPERATION Figure 3-1. 6040 Timing Circuits

46 THEORY OF OPERATION Figure 3-2. Microprocessor Block Diagram

47 THEORY OF OPERATION Memory and I/O Decoding (Schematic 6040-33, Sheet 2) Program Memory – ROM: Z.17, the EPROM, encompasses the full 64K co

48 THEORY OF OPERATION Figure 3-3. Simplified Interconnection Diagram

49 THEORY OF OPERATION Software normally sets port A to all zeroes. During the primary 50 ms operating system timer tick interrupt, the lower ha

5 CONTENTS SECTION 4 MAINTENANCE AND CALIBRATION 56 Calibration 56 General

50 THEORY OF OPERATION The presettable counters, Z16-A and Z16-B, are enabled by the signals, DCNT24 and DCNT220, respectively. These come from

51 THEORY OF OPERATION GPIB Interface (Schematic 6040-33, Sheet 8) Z35's CS7 (chip select 7) enters Z4 on pin 3 and in conjunction with

52 THEORY OF OPERATION Table 1-8. J8, Microprocessor to Module Interface Signals Signal(s) Pin Number Description QAD0-QAD7 8-1 8 multip

53 THEORY OF OPERATION Table 1-9. J9, Microprocessor to ECL Interface Signals Signal Pin Number Description PLLVA

54 THEORY OF OPERATION Table 1-10. Mainframe Memory Map Memory Range

55 THEORY OF OPERATION Power Supply Board (Schematic 6040-34) There are four regulated voltages generated by the power supply: ±12 V. +5.0 V an

56 SECTION 4 MAINTENANCE AND CALIBRATION CALIBRATION General It is recommended that calibration of the 6040 mainframe be verified every 12

57 MAINTENANCE AND CALIBRATION Rep Rate Check Remove any plug-in module. Connect the TRIG OUT to channel B of the Time Interval Counter (TIC).

58 MAINTENANCE AND CALIBRATION 1 ns Delay Connect the TIC as above. Set the 6040, with the front panel controls, for 30 ns width and 100 ns

59 SECTION 5 PARTS LIST Abbreviations CER Ceramic PF Picofarad COMP COMPOSITION SIP

6 CONTENTS ILLUSTRATIONS Figure No. Page Frontispiece Model 6040 Universal Pulse

60 PARTS LIST C20 110-033 0.1 µF 20% 50 V CER MONO C21 112-018 8 PF 5% 500 V MIC C44 110-019 0.05 µF 220% 25 VCERMONO C22 112-031 1

61 PARTS LIST Q4 430-055 2N5836 R35 213-512 5.1 K 5% ¼ W COMP Q5 430-055 2N5836 R36 213-103 10 K 5% ¼ W COMP Q6

62 PARTS LIST R79 222-003 49.9 OHM 1% ¼ W MF R127 213-271 270 OHM 5% ¼ W COMP R80 222-003 49.9 OHM 1% ¼ W MF R128 213-391 390

63 PARTS LIST AND SCHEMATICS R171 221-001 49.9 OHM 1% ½ W MF Z9 440-079 MC10116 Z10 440-200 10H1

64 PARTS LIST AND SCHEMATICS C14 110-033 0.1 µF 20% 50 V CER R2 223-016 4.7K X 9SIP RES NETWORK C15 110-033 0.1 µF 20% 50 V CER

65 PARTS LIST AND SCHEMATICS Z34 440-152 74HC10 R9 213-511 510 OHM 5% ¼ W COMP Z35 440-203 74HC138

7 SAFETY PRECAUTIONS The following warnings, which appear both here and in the main body of the test, are to alert the user of potential safety

8 UNIVERSAL PULSE GENERATOR MODEL 6040 The Model 6040 System consists of a crystal-controlled programmable pulse/digital

9 SECTION 1 SPECIFICATIONS MODEL 6040 MAINFRAME CHARACTERISTICS Timing Characteristics INTERNAL REP RATE Range: 0.01 Hz – 100 MHz Reso